Visible to Intel only — GUID: hbj1517814998976
Ixiasoft
Visible to Intel only — GUID: hbj1517814998976
Ixiasoft
LVDS SERDES FPGA IP Release Notes
If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Quartus® Prime Design Suite Update Release Notes.
Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Section Content
LVDS SERDES FPGA IP (intel_lvds) v23.2.0
LVDS SERDES Intel FPGA IP (intel_lvds) v23.1.0
LVDS SERDES Intel FPGA IP (intel_lvds) v23.0.0
LVDS SERDES Intel FPGA IP v20.0.1
LVDS SERDES Intel FPGA IP v20.0.0
LVDS SERDES Intel FPGA IP v19.5.0
LVDS SERDES Intel FPGA IP v19.4.0
LVDS SERDES Intel FPGA IP v19.3.0
LVDS SERDES Intel FPGA IP v18.1
LVDS SERDES Intel FPGA IP v18.0
Intel FPGA LVDS SERDES IP Core v17.1
Altera LVDS SERDES IP Core v17.0
Altera LVDS SERDES IP Core v14.1
Altera LVDS SERDES IP Core v14.0 Arria 10 Edition